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Tiempo Secure’s new TESIC RISC-V IP successfully passes SERMA CC EAL5+ security assessment tests

Tiempo Secure’s new TESIC RISC-V IP successfully passes SERMA CC EAL5+ security assessment tests Tiempo Secure’s latest TESIC design, a Secure Element targeting applications such as iSIM, eSE, Payment, UWB, Digital ID, IoT security and Mobile Application Processors, has successfully passed SERMA CC EAL5+ AVA VAN.5 security testing, further demonstrating Tiempo’s unique security expertise. Grenoble, France […]

Tiempo Secure et GreenWaves Technologies démontrent le rôle de Secure Element en tant que maître dans un système embarqué

GreenWaves Technologies et Tiempo Secure ont démontré l’avantage de donner le rôle de maître à un Secure Element intégré dans un System-on-Chip : cette architecture améliore significativement la sécurité du système, tout en rendant l’implémentation plus efficace. Grenoble, France – 12 avril 2023 – Tiempo Secure et GreenWaves Technologies ont démontré comment un Secure Element […]

Tiempo Secure appoints IPro as its Sales Representative in Israel

IPro Silicon IP, a sales outsourcing provider in Israel, and Tiempo Secure, an expert in silicon intellectual property (IP) development and embedded software for securing connected objects, are proud to announce that IPro has been appointed as Tiempo Secure representative to provide security solutions for SoCs and Systems designs to the chip design community in […]

Tiempo Secure announces TESIC RISC-V Secure Element IP and development kit

Building upon its longstanding expertise in semiconductor design, Tiempo Secure is proud to announce its TESIC RISC-V Secure Element IP, which brings an unprecedented level of security to embedded systems, it is certification-ready for Common Criteria EAL 5+ level, and makes SoC development easy thanks to its integration with the complete RISC-V ecosystem. Tiempo Secure […]

Tiempo Secure becomes a Strategic Member of RISC-V International

As a Strategic member of RISC-V International, Tiempo Secure will secure and integrate processors implementing the RISC-V open standard instruction set architecture (ISA) into its TESIC Secure Element IP, thus easing integration for its customers; in addition, Tiempo Secure will bring its recognized security expertise to the RISC-V community. Grenoble, France – October 11, 2022 – By becoming […]