TESIC Secure IP Platform


  • TESIC is a silicon-proven secure IP platform that targets various secured applications such as dual-interface smartcards for banking transactions, fare transit and ticketing, secured identification documents, secure elements for mobiles, and DRM applications.


  • Secure clockless 16-bit microcontroller, with 20-bit address space,
  • Secure clockless crypto-processors for DES/3DES, AES, RSA and ECC
  • Other peripherals such as CRC, timers, memory controller…
  • Available with TESIC-SDK, a complete Software Development Kit including a library of drivers, a crypto library and boards for software development and debugging


  • Shortens design time of secured ICs for custom applications
  • Delivers pre-qualified security and outstanding performance

Architecture TESIC Secure IP Platform

 schema architecture TESIC _Secure IP platform


TESIC Process Migration Path

TESIC Secure Platform has been entirely designed with unique asynchronous technology developed by Tiempo. This makes TESIC fully clockless and delay-insensitive, meaning that internal functionality is immune to voltage and timing variations.

Due to this unique property, TESIC Secure Platform can be easily, rapidly and very safely ported to any advanced process node with smaller geometry. To date, the TESIC Secure Platform has been silicon-proven on 130 nm, 110-90 nm, 65 nm and 32-28 nm silicon processes, making it ready for use in the most advanced Secure Element designs.



TESIC-SDK Software Development Kit


  • TESIC-SDK includes the required software to develop, optimize and debug applications for TESIC-based chip products :
    • A subset of the ANSI C standard library
    • Drivers for accessing TESIC-SC hardware
    • A Crypto Library for leveraging Tiempo high-performance and highly-secured cryptographic coprocessors
  • TESIC-SDK is available with FPGA and ASIC boards

schema Features TESIC_Secure

Architecture TESIC-SDK Software Development Kit

schema Architecture TESIC_Secure SDK Software