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TESIC Software Development Kit and Secure Software Libraries

Software Development Kit (TESIC-SDK), CC EAL5+ certified secure boot loader (TESIC-AdminLoader), CC EAL5+ certified secure cryptographic library (TESIC-CryptoLib), secure external storage manager (TESIC-ESM), and TESIC Security Toolbox (TESIC-TBX)

Tiempo Secure offers a full development environment and secure software libraries to develop and debug secure software code on TESIC platforms.

TESIC Software Development Kit (TESIC-SDK) for TESIC with proprietary clockless CPU includes a compiler, a linker and a debugger based on GNU GCC/GDB and optimized for TESIC CPU, and is integrated into the ECLIPSE framework. Third-party RISC-V software development environments (supporting RV32IMC instruction set) can be used for TESIC RISC-V.

A CC EAL5+ PP0117 and EMVCo certified secure boot loader (TESIC-AdminLoader), a CC EAL5+ PP0117 and EMVCo certified cryptographic library (TESIC-CryptoLib), and a secure external storage manager (TESIC-ESM) are available for the secure software programmers.

Finally, Tiempo Secure offers a general-purpose security toolbox (TESIC-TBX) implementing the typical security routines that can be called by the SoC application processor, including device identification/authentication, secure boot, secure firmware update, secure storage and secure debug routines.

Software Development Kit
(TESIC-SDK)

  • Compiler, linker and debugger based on GNU GCC/GDB with compilation chain optimized for TESIC MCU, or
  • Third-party RISC-V software development environments (supporting RV32IMC instruction set)
  • Integrated into ECLIPSE

CC EAL5+ secure boot loader
(TESIC-AdminLoader)

  • Flash read/write API (secure storage)
  • Secure firmware loading into NVM (load image signed by authorized firmware vendor)
  • Firmware execution start
  • Support for development (load/update of firmware in the context of secure software development)
  • CC EAL5+ PP0117 certified

CC EAL5+ secure cryptographic library
(TESIC-CryptoLib)

  • AES
    • ECB, CBC, CMAC and CTR
    • Keys of 128/192/256 bits
  • DES/3DES
    • ECB and CBC
    • Keys of 64/192 bits
  • ECC
    • Key generation
    • ECDH
    • ECDSA (signature and verification)
    • ECIES (Elliptic Curve Integrated Encryption Scheme)
    • Keys up to 521 bits
  • RSA
    • Key generation
    • Encrypt/decrypt
    • Sign/verify
    • Keys up to 4096 bits
  • SHA
    • SHA1
    • SHA2 (224, 256, 384, 512 bits)
    • SHA3
    • HMAC (signature)
  • CRC computation
  • TRNG: True Random Number Generation
  • DRNG: Deterministic Random Number Generation
  • CC EAL5+ PP0117 certified

Secure external storage manager
(TESIC-ESM)

  • Optimized handling of cache miss
  • Flash write for dynamic data (secure storage with data freshness guarantee)
  • Wear leveling
  • Anti-tearing
  • Anti-rollback

TESIC Security Toolbox
(TESIC-TBX)

  • Device identification/authentication
  • Secure boot
  • Secure firmware update (OTA)
  • Secure storage
  • Secure debug
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See Also

TESIC JavaCard 3.0.5 OS

TESIC JavaCard 3.0.5 is a government grade, interoperable execution platform for high secure applications, such as payment and identification/authentication

TESIC CC EAL5+ Secure Element Hard Macro

TESIC is a CC EAL5+ PP0117 proven/certification-ready secure element IP that is delivered as hard macro for plug-and-play System-on Chip (SoC) integration

TESIC RISC-V CC EAL5+ Secure Element Soft/Hard Macro

TESIC RISC-V is a CC EAL5+ PP0117 ready secure element IP including a secure 32-bit RISC-V core and that is delivered as soft IP or hard macro for plug-and-play System-on Chip (SoC) integration
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