Asynchronous design technology

Description

• Clockless => no clock at all
• Quasi-Delay Insensitive (QDI) => logic function guaranteed regardless of any timing variation
• Dual-rail 4-phase logic

Benefits

• Immune to delay/energy variations, therefore ideal for applications requiring robust processing under tough environmental conditions
• QDI logic allows chips to operate at maximum speed with respect to available energy, therefore is ideal for contactless applications (remote power source, variable energy)
• Enables designing more efficient hardware security countermeasures
• Enables easier migration to finer/advanced processes (55 nm and below)

Maturity

• Availability of an automated asynchronous logic synthesis tool and complete asynchronous design flow, complementary to industry-standard design flows and developed by Tiempo
• Used by several semiconductor companies on advanced processes

Competitive advantages

• Speed
• Robustness
• Security
• Easy path to finer/more advanced process